Speakers to be confirmed

Greg Diamos

Greg leads transformation engineering at Landing AI, focusing on building new AI engineering organizations.  He is a founding member of MLPerf. Previously he lead AI research at Baidu’s Silicon Valley AI Lab (SVAIL), where he helped develop the Deep Speech and Deep Voice systems. Before Baidu, Greg contributed to the design of compiler and microarchitecture technologies used in the Volta GPU at NVIDIA, including the invention of the SIMT independent thread scheduling system. Greg holds a PhD from the Georgia Institute of Technology, where he led the development of the GPU-Ocelot dynamic compiler, which targeted CPUs and GPUs from the same program representation.

Peter Mattson

Peter Mattson leads the ML Performance Measurement at Google. He co-founded and is the General Chair of MLPerf. Previously, he founded the Programming Systems and Applications Group at NVIDIA Research, was VP of software infrastructure for Stream Processors Inc (SPI), and was a managing engineer at Reservoir Labs. His research focuses on accelerating and understanding the behavior of machine learning systems by applying novel benchmarks and analysis tools. Peter holds a PhD and MS from Stanford University and a BS from the University of Washington.

Sailesh Kottapalli

Sailesh Kottapalli is an Intel Senior Fellow and the chief architect of data center processor architecture in the Silicon Engineering Group. He leads a team of architects responsible for developing the architecture of Intel® Xeon® and Intel® Atom™ server product lines as well as the overall compute solutions strategy for datacenter segment. He also leads a cross-organizations effort in driving the technology leadership on the Interconnect pillar. Kottapalli joined Intel in 1996 as a design engineer working on the first Intel® Itanium® processor, then code-named “Merced.” Subsequently, he served as lead engineer for several Intel Itanium and Intel Xeon processor evaluations, and more recently, as lead architect for a series of Intel Xeon server processors. His work in this area earned Kottapalli an Intel Achievement Award for delivering record generational performance improvements in a high-end server product. An active participant in industry and internal conferences, Kottapalli has authored or co-authored several published technical papers, delivered talks and taken part in roundtables and panel discussions. He has also been granted approximately three dozen patents in processor architecture, with additional patents pending. Kottapalli holds a bachelor’s degree in computer science from Andhra University in India and a master’s degree in computer engineering from Virginia Tech.